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features ? digital pll control 622.08 mhz lvpecl output, ultra-low jitter 155.52 mhz lvpecl output, ultra-low jitter two 77.76 mhz lvpecl outputs, low litter 8 khz lvpecl output dual 8 khz input references supports manual and autonomous modes 3.3 v dc power supply applications the SCG6500NT is designed for use as a reference input for oc-192 framers and serdes. it generates less than 1 psrms jitter over the oc-192 bandwidth. SCG6500NT is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for tdm, pdh, sonet, and sdh network equipment. the SCG6500NT provides a jitter filtered, wander following output signal synchronized to a superior stratum or peer input reference signal. SCG6500NT synchronous clock generator pll 2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com bulletin sg034 page 1 of 12 revision (advanced) a05 date 24 june 02 issued by mbatts
advance data sheet #: sg034 p age 2 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice the SCG6500NT unit provides high precision phase lock loop frequency translation for the telecommunication applications. the SCG6500NT unit generates lvpecl outputs from an intrinsically low jitter, voltage controlled crystal oscillator. the SCG6500NT unit can be configured to provide a jitter attenuated, internal reference. SCG6500NT is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for tdm, pdh, sonet and sdh network equipment . the SCG6500NT provides a jitter filtered, wander following output signal synchronized to a superior stratum or peer input reference signal. the SCG6500NT include the following features: free run, and alarm outputs for loss-of-reference, (lora, lorb), loss-of-lock, (lol). the lvpecl outputs may be put into a disable condition for external testing purposes. the SCG6500NT is a 3.3 volt component. the unit can be used in applications that require temperature rating of 0 - 70 c. the SCG6500NT package dimensions are 1.3? x 1.963? x 0.45? on a eight layer fr4 board with a high speed differential connector. general description general mode description the SCG6500NT may be operated in any one of three modes, manual , autonomous non-revertive , or autonomous revertive mode . in manual mode , the modules operating state is determined solely and exclusively by the control inputs. the SCG6500NT will unconditionally follow the control inputs. proper synchronization and module operation are user responsibilities. in autonomous non-revertive or revertive mode , the modules operating condition is determined by the control inputs and the validity of the selected operational condition. the SCG6500NT will follow control inputs as long as the selected operating condition is valid. in autonomous mode the module alarms are monitored to determine the validity of the current operational condition state. if the selected reference becomes invalid the module will attempt to lock to the redundant reference. if no valid references are available the module will set the internal vcxo to hold last if the hlv output is active. hlv is a signal indicating that there is a hold last value present. the module will set the internal vcxo to free run if references a & b are invalid and the hlv output is not active. for example, the control inputs are set to lock to refa and no alarms are active. the user then sets the control inputs to lock to refb but the lorb alarm is active. the module will remain in lock to refa. autonomous mode establishes absolute preference for valid operating conditions; refa is valid; refb, though selected, is invalid; the module remains in lock to the valid reference, refa. *note the module doesn?t assume responsibility for reference qualification. reference qualification is a user responsibility. the module only verifies that a signal is present but cannot check for stratum quality. a signal must be present for 10 seconds before the module considers it a valid reference. in autonomous revertive mode , the control inputs set a preferred reference. the module will revert to the preferred reference as long as it is considered valid. in autonomous non-revertive mode , there is no preferred reference. the module will remain on a reference as long as it is considered valid. mode inputs table 1 mode1 mode 0 mode 0 x manual 1 0 autonomous non-revertive 1 1 autonomous revertive module reset table 2 reset description 0 normal operation 1 module reset to power on condition
advance data sheet #: sg034 p age 3 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice control status outputs , used to report the current control of the module in both manual and autonomous modes. in manual mode the control status outputs reflect the control inputs. in autonomous mode the control status outputs may be different than the control inputs depending on circumstances. when the internal state machine acknowledges the need for a change in control it updates the control status outputs on the next internal clock cycle of 12.86 ns. hold last valid , used to report that a lock value has been entered into the hold last register. in autonomous mode the hold last valid output is used to restrict the entry into hold last. lora and lorb, used to report that no signal is present on respective reference. lor alarms are missing pulse detectors and don?t indicate frequency out of range. in autonomous mode an lor alarm is blanked to the internal state machine for ten seconds after alarm transitions to non-alarm state. external lor alarms outputs are not blanked. lol , used to report that the reference is greater than 94 out of phase with the vcxo. lol alarm is only valid in a lock state (i.e. lock to reference a). in autonomous mode the lol is used to start a ten second qualification timer on the respective reference. once the timer expirers the respective reference is considered valid by the internal state machine. status output descriptions table 7 lol output lol description 0 no alarm 1 loss of lock table 4 control status outputs cs1 cs0 current operational status 0 0 free run 0 1 lock to reference a 1 0 lock to reference b 1 1 hold last table 6 lora or lorb outputs lora or lorb description 0 no alarm 1 loss of reference table 5 hold last valid output hlv description 0 hold last invalid 1 hold last valid control descriptions free run is an operational state that sets the module output to a nominal frequency. lock to reference a or b is an operational state that phase locks the module output to the respective reference. hold last is an operational state that sets the module output to a previous loop frequency. the value stored in the hold last latch is updated once every second. table 3 control inputs ctl1 ctl0 operational condition 0 0 free run 0 1 lock to reference a 1 0 lock to reference b 1 1 hold last output enable settings enq1, enq2, enq3, enq4, and enq5 are used to enable and disable the respective output. logic low on the enq pin will enable the output. logic high on the enq pin will state lock the output. table 8 enable control inputs enq# output state 0 enabled 1 state locked
advance data sheet #: sg034 p age 4 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice specifications table 10 symbol parameter minimum nominal maximum units notes v cc power supply voltage 3.125 3.3 3.465 v 2.0 i cc power supply current - 400 tbd ma t o temperature range 0 - 70 c f fr free run accuracy -20 - 20 ppm f refa input reference a - 8 - khz f refb input reference b - 8 - khz f cap capture/pull-in range -25 - 25 ppm f bw jitter filter bandwidth 1 3.6 10 hz 3.0 t aq acquisition time - 200 - ms 4.0 t rf output rise and fall time (20%-80%) @622.08 mhz - 250 - ps 5.0 @155.52 mhz - 300 - ps 5.0 @77.76 mhz - - 1 ns 5.0 dc output duty cycle 45 50 55 % j gen jitter generation @622.08 mhz - - 0.8 psrms 6.0 @155.52 mhz - - 1 psrms 7.0 @77.76 mhz - - 4 psrms 8.0 j pk jitter transfer peaking - 0.1 0.2 db mtie sr mtie@sychronization rearrangement - 6 - ns absolute maximum rating table 9 symbol parameter minimum nominal maximum units notes vcc power supply voltage -0.5 - 4.0 volts 1.0 vi input voltage -0.5 - 4.0 volts 1.0 ts storage temperature -40 - 100 c 1.0 notes: 1.0: operation of the device at these or any other condition beyond those listed under operating specifications is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. 2.0: requires external regulation and supply decoupling (2.2 uf, 330 pf) 3.0: 3db loop response 4.0: from a 20 ppm step in reference frequency 5.0: see recommended line termination for load requirements 6.0: jitter based on sonet oc-192 bandwidth (12 khz to 80 mhz) 7.0: jitter based on sonet oc-48 bandwidth (12 khz to 20 mhz) 8.0: jitter based on sonet oc-12 bandwidth (12 khz to 5 mhz)
advance data sheet #: sg034 p age 5 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice input and output characteristics table 11 symbol parameter minimum nominal maximum units notes lvttl input and output characteristics v ih high level input voltage 2 - 3.6 v v il low level input voltage 0 - 0.8 v t io i/o to output valid - - 10 ns c o output capacitance - - 10 pf v oh high level output voltage, l oh = 04ma 2.4 - - v vcc min. v ol low level output voltage, l ol = 8ma - - 0.4 v vcc max. t ir input reference signal pulse width 25.72 - - ns lvpecl output characteristics for q1 & q2 v oh high level output voltage 2.27 - 2.52 v v ol low level output voltage 1.49 - 1.68 v c l output capacitance - - 10 pf t skew differential output skew - - 50 ps lvpecl output characteristics for q3, q4 & q5 v oh high level output voltage - 2.48 - v v ol low level output voltage - 0.96 - v c l output capacitance - - 10 pf t skew differential output skew - - 50 ps
advance data sheet #: sg034 p age 6 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice pin description table 12 pin # pin name description input default state 3,8,13,18, v cc supply voltage relative to ground n/a 23,28,33,38, 43,48,53,58, 63,68,73,78, 83,88,93,98 1,2,5,7,9, gnd ground n/a 10,12,16,17, 22,27,31,32, 37,42,46,47, 51,52,57,62, 66,67,72,77, 81,82,87,92, 94,95,96,97,100 55 mode0 mode input logic 0 75 mode1 mode input logic 0 70 ctl0 control input logic 0 74 ctl1 control input logic 0 30 reset reset module to power on conditions logic 0 15 enq1 active low enable q1 logic 0 19 enq2 active low enable q2 logic 0 79 enq3 active low enable q3 logic 0 60 enq4 active low enable q4 logic 0 34 enq5 active low enable q5 logic 0 99 refa input reference n/a 4 refb input reference n/a 69 cs0 control operational status n/a 64 cs1 control operational status n/a 54 hlv hold last valid n/a 65 lol loss-of-lock ?active reference? n/a 45 lora loss-of-reference a n/a 39 lorb loss-of-reference b n/a 11 q1p positive lvpecl differential output n/a 6 q1n negative lvpecl differential output n/a 21 q2p positive lvpecl differential output n/a 26 q2n negative lvpecl differential output n/a 36 q3p positive lvpecl differential output n/a 41 q3n negative lvpecl differential output n/a 71 q4p positive lvpecl differential output n/a 76 q4n negative lvpecl differential output n/a 56 q5p positive lvpecl differential output n/a 61 q5n negative lvpecl differential output n/a 84,85, jtag no connection. do not connect. 89,90 do not connect. no bsdl files available 14,20,24,25 nc no connection. do not connect 29,35,40,44, 49,50,59,80,86,91
advance data sheet #: sg034 p age 7 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice functional block diagram figure 1 state machine ref sel dac sync pd sync lpf vcxo 622.08 mhz hlv cs1 cs0 mode0 mode1 ctl0 ctl1 enq1 divider control ref a ref b lora lorb lol 77.76 mhz 8 khz 77.76 mhz 155.52 mhz q2p q3p q4p q5p q2n q5n q3n q4n q1p q1n input connection output connection enq2 enq3 enq4 enq5 loss of reference timing diagram figure 2 lor (loss-of-reference) ext 8 khz ref int 8 khz ref lor 125 s 125 s - 250 s ?
advance data sheet #: sg034 p age 8 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice lock hold last free run user selected free run mode user selected lock mode user selected hold last mode user selected free run mode user selected lock mode user selected lock mode user selected hold last mode user selected hold last mode user selected free run mode note: lock mode is one in which the unit is locked to the selected reference, which is either ref a or ref b free run lock hold last user selected free run mode or no valid references available or no valid hold last available user selected hold last mode and valid hold last available user selected lock mode and valid references available user selected free run mode or no valid hold last available user selected free run mode or (no valid hold last available and no valid references available) user selected lock mode and valid reference available (user selected hold last mode or no valid reference available) and valid hold last available user selected lock mode and valid references available (user selected hold last mode or no valid references available) and valid hold last available notes: 1) lock mode is one in which the unit is locked to either ref a or ref b, but not always the selected reference 2) see general mode description for revertive and non-revertive operation manual mode state machine figure 3 autonomous mode state machine figure 4
advance data sheet #: sg034 p age 9 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice recommended connector placement and component keep out area figure 5 15 96 100 0 . 1 2 5 1 . 8 3 8 1 . 9 6 3 0.125 0.650 1.175 1.300 0 . 3 5 0 0 . 4 0 0 0.175 0.225 0 . 5 5 0 1.125 0 . 0 0 0 0.000 ?0.104 finished hole ?0.180 copper pad ball grid = 5 x 20 @ 0.050 pitch, footprint for samtec connector samtec pn: yfs-20-03-e-05-sb-k-tr consult samtec for detailed specifications www.samtec.com 1 . 3 0 0 [ 3 3 . 0 2 ] 1.963 [49.85] max. height 0.450 [11.43] 0.276 [7.01] 0.050 [1.27] 1 . 0 5 0 [ 2 6 . 6 7 ] 1.713 [43.50] 0.525 [13.34] maximum dimensions figure 6
advance data sheet #: sg034 p age 10 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice recommended line termination figure 7 100 ? q+ q- vcc gnd lvpecl output 50 ohm transmission line 50 ohm transmission line d+ d- vcc gnd lvpecl input 3.3 vdc 3.3 vdc 56 ? q+ q- vcc gnd lvpecl output 50 ohm transmission line 50 ohm transmission line d+ d- vcc gnd lvds input 3.3 vdc 3.3 vdc 56 ? 82 ? 82 ? recommended lvpecl to lvds conversion for q1 & q2 figure 8
advance data sheet #: sg034 p age 11 of 12 rev: a05 date: 6 / 24 / 02 ? copyright 2002 the connor-winfield corp. all rights reserved specifications subject to change without notice revision revision datenote a00 7/20/01 adv ance informational release a01 7/24/01 added samtec connector pn a02 7/30/01 changed pin outs a03 12/03/01 updated pin descriptions a04 12/10/01 made correction to diagrams a05 6/24/02 added tab le 2, module reset
2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com advance data sheet

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